Lyles College Eng

ECE 85L - Digital Logic Design Laboratory (1 Units)

Usage, design, and implementation techniques for combinatorial and sequential circuits.  Experiments utilizing logic gates, Karnaugh maps, multiplexers, decoders, probrammable logic devices, latches, flipflops, counters and shift registers.  Combinatorial and state machine design projects.  Computer Assisted Engineering (CAE).  (3 lab hours)

Prerequisites:  ECE 85 or concurrently.


Syllabus Information
 
Laboratory Procedures (pdf documents)
Lab 1 - Introduction, Laboratory Procedures, Laboratory Equipment:  ECE-85L-Lab-01.pdf
 
Lab 2 - Schematic Capture, Simulation, and Direct AOI Implementation:  ECE-85L-Lab-02.pdf
 
Lab 3 - Static Gate Characteristics (Switching Thresholds, Truth Tables):  ECE-85L-Lab-03.pdf
 
Lab 4 - Dynamic Gate Characteristics:  ECE-85L-Lab-04.pdf
 
Lab 5 - Design and Implementation of Combinatorial Circuits with Logic Gates:  ECE-85L-Lab-05.pdf
 
Lab 6 - Circuit Minimization, Implementation with NAND Gates:  ECE-85L-Lab-06.pdf
 
Lab 7 - Programmable Logic Device (PLD) BCD Design Problem:  ECE-85L-Lab-07.pdf
                            PLD SPEC SHEET - ATF750C.pdf
                            WinCUPL PLD SOFTWARE MANUAL - WinCUPL.pdf
                            WINCUPL Tutorial - WINCUPL_Tutorial.docx
 
Lab 8 - Multiplexors and Decoders:  ECE-85L-Lab-08.pdf
 
Lab 9 - Verilog HDL and Arithmetic Circuits:  ECE-85L-Lab-09.pdf
 
Lab 10 - Verilog HDL, Test Benches (ModelSim):  ECE-85L-Lab-10.pdf
 
Lab 11 - Astable and Monostable Multivibrators:  ECE-85L-Lab-11.pdf
 
Lab 12 - Registers:  ECE-85L-Lab-12.pdf
 
Lab 13 - Counters:  ECE-85L-Lab-13.pdf
 
Lab 14 - Synchronous State Machine Design Problem:  ECE-85L-Lab-14.pdf
 


This laboratory manual and the contents thereof are for the sole purpose of
supporting ECE 85L for the designated semester.


They may not be reproduced in any fashion without the written consent of Dr. Gregory R. Kriehn,
of the Electrical and Computer Engineering Department, at California State University, Fresno.

Upcoming Events

Patent Board
16 Oct 2018
08:00AM - 09:00AM
Class Preparation
16 Oct 2018
12:00PM - 02:00PM
ECE 85 - Digital Logic Design
16 Oct 2018
02:00PM - 03:15PM

Events Calendar

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